1. Field of the Invention
The present invention relates to methods and circuits for noise shaping, especially for noise shaping analog and digital circuits which widely distribute the quantize noise, due to the analog-to-digital conversion, outside the signal frequency band, so as to minimize the quantize noise in the signal frequency band and to obtain the high accuracy.
2. Background Art
FIG. 17 shows a signal flow of a conventional type second-order .DELTA.-.SIGMA. noise shaping circuit. In the drawing, the circuit is adopted with a commonly-used noise shaping technique wherein the second order noise shaping characteristics are obtained by a .DELTA.-.SIGMA. oversampling method. Such a technique is, for example, disclosed in the publication "Oversampling A-D conversion technique", NIKKEI Electronics Nos. 452-454, Nikkei BP Co. The second-order .DELTA.-.SIGMA. noise shaping circuit shown in FIG. 17 consists mainly of an input terminal 11 for receiving an input signal X, an output terminal 12 for generating an output signal Y, subtractors 13 and 19, integrators 15 and 16 in which the transfer functions, utilizing the z-function, are referred to as 1/(1-z.sup.-1), a quantizer 17 for executing the quantization so as to generate a quantize noise Q, and a one-sampling delay 18, respectively. In general cases, the one-sampling delay 18 will be composed as a D-to-A converter in the case of A-to-D conversion, while the delay 18 will be composed as a DFF (Delay Flip-Flop) in the case of D-to-A conversion.
The following is a description of the signal flow of the second-order .DELTA.-.SIGMA. noise shaping circuit shown in FIG. 17. First, the input signal X applied to the input terminal 11 is supplied to the subtractor 13. Furthermore, a delay signal D, namely the output signal Y delayed for one-sampling period via the one-sampling delay 18, is also supplied to the subtractor 13. The subtractor 13 subtracts the delay signal D from the input signal X and supplies the subtraction results to the integrator 15. The integrator 15 integrates the supplied signal and generates an output signal N, i.e. the integration results, to the subtractor 19. The subtractor 19 subtracts the delay signal D from the output signal N and supplies the subtraction results to the integrator 16. The integrator 16 integrates the supplied signal and generates an output signal M, i.e. the integration results, to the quantizer 17. The signal, quantized in the quantizer 17, is then generated from the output terminal 12 in the way of the output signal Y.
FIG. 10 shows a more detailed circuit diagram of the conventional second order .DELTA.-.SIGMA. noise shaping circuit shown in FIG. 17.
Generally, as shown in FIG. 10, when the configuration in FIG. 17 is applied to an A-to-D converter, the integrators 15 and 16 will be realized by inverting amplifiers 115 and 116, and capacitors 51 and 52. The output signal Y of the quantizer 17 in FIG. 17 is supplied to the one-sampling delay 18 and delayed for a one-sampling delay period. The output signal Y, delayed for a one-sampling period, is then simultaneously supplied to the subtractors 13 and 19. However, in the case where the inverting amplifiers 115 and 116 are adopted as shown in FIG. 10, the plus/minus sign of the delayed output signal Y is inverted therein.
In FIG. 17, the output signal Y is generated by the quantizer 17 and delayed for one-sampling period. In FIG. 10, this signal having the one-sampling delay is generated by D-to-A converters 118 and 118'. Furthermore, the output signal Y, having the one-sampling delay and the sign thereof being inverted, is added with the input signal by means of resistor R.sub.2, so that, essentially, a subtraction is executed. This signal is then integrated by the inverting amplifier 115 and the integrated results, referred to as the output signal N, is generated. Because the sign of the output signal N has been inverted, the signal addition executed by a resistor R.sub.4 in the next stage, with the output signal Y having one-sampling delay, is essentially deemed to be a subtraction. The signal supplied to the Inverting amplifier 116 is then integrated therein, so that an integration results, referred to as the output signal M, is generated. The signal M 1s then quantized by a comparator 117 and generated via the output terminal 12 as the output signal Y.
The circuit shown in FIG. 17 can be expressed by the following formulae (1) to (3) wherein symbols N, M, Q and X designates the output signal of the integrator 15, the output signal of the integrator 16, quantize noise in the quantizer 17, and the final output signal, respectively, so that the characteristics of this circuit can be analyzed by solving these formulae. ##EQU1##
The following formula (4) is obtained by solving the above formulae (1) to (3) concerning the input signal X and output signal Y. EQU Y=X+(1-z.sup.-1).sup.2 Q (4)
In formula (4), the term "(1-z.sup.-1)" designates the differential, so that the output signal Y is equal to the additional results of the input signal X and second order differential of the quantize noise Q. The quantize noise Q is a noise having a Gaussian distribution regardless of the frequency, namely the white noise shown in FIG. 18. FIG. 18 shows the noise shaping effect concerning the quantize noise Q. In the drawing, the curve Q shows the quantize noise Q, and the curve b shows the secondary differentiated results of the quantize noise Q.
According to this drawing, in which the ordinate axis shows the power and the transverse axis shows the frequency, the secondary differentiated results "b=(1-z.sup.-1).sup.2 Q" are distributed such that components in the low frequency region are low and those in the high frequency region are high. Such a characteristic is so called the "noise shaping". As described above, according to the conventional noise shaping technique shown in FIG. 18, the quantize noise (white noise) having the Gaussian distribution is deformed. In addition, the high frequency region of the deformed noise is eliminated by means of a filter so as to minimize the noise components in the low frequency region, and to produce only those in the low frequency region. Therefore, even when a low resolution quantizer is utilized, highly accurate characteristics can be obtained.
The following is a description of the MASH (Multi-stage noise SHaping) method (IEEE Journal of Solid-State Circuit Vol. 22, No. 6, pp 921-929, December 1987) which has been proposed for the conventional .DELTA.-.SIGMA. oversampling technique.
FIG. 9 shows the signal flow of the conventional noise shaping digital circuit utilizing the MASH technique, and realizing the circuit having the second-order noise shaping characteristics, as in FIG. 10 by means of the MASH method. In the drawing, components corresponding to those of FIG. 17 are attached with the same symbols. The circuit shown in FIG. 9 comprises a subtractor 41, a differentiator 42 and an adder 43, which are not contained in the circuit in FIG. 17.
The signal flow of the circuit will be described first. The input signal X imparted to the input terminal 11 is supplied to the subtractor 13. The first quantizer 17 generates an output signal Y1. The signal Y1 is supplied to the one-sampling delay 18 wherein the signal is delayed for a one-sampling period. The delayed signal is then supplied to the subtractor 13. The subtractor 13 subtracts the output signal Y1 delayed for a one-sampling period, from the input signal X, and supplies the subtraction results to the first integrator 15. The first integrator 15 integrates the imparted signal thereto and supplies, to the subtractor 41, the integration results referred to as the output signal N. The subtractor 41 subtracts, from the input signal X, the output signal N generated by the first integrator 15. The subtractor 19 subtracts an output signal Y2, generated by a second quantizer 17' and delayed for a one-sampling period, from the subtraction results P of the subtractor 41. The output signal of the subtractor 19 is then supplied to the second integrator 16 and integrated whereby the integrated results are produced in the way of the output signal M. The signal M is then supplied to a second quantizer 17' so as to quantize the signal M and to generate the quantized results, namely the output signal Y2. The signal Y2 is then differentiated by the differentiator 42, and the differentiated results thereof is supplied to the adder 43. The output signal Y1, quantized in the first quantizer 17, is added with the differentiated results in the differentiator 42, and the addition results are generated by the output terminal 12 in the way of the output signal Y.
The circuit, utilizing the MASH technique, shown in FIG. 9 is aimed at improving stability. More specifically, in the case of the conventional .DELTA.-.SIGMA. oversampling technique, the signal flow of the circuit in FIG. 17 is "subtractor 13.fwdarw.first integrator 15.fwdarw.subtractor 19.fwdarw.second integrator 16.fwdarw. quantizer 17.fwdarw.one-sampling delay 18.fwdarw.subtractor 13". In this signal flow, two integrators are maintained in a series and have a 180.degree. phase delay, so that the circuit is naturally unstable. In contrast, the circuit shown in FIG. 9, concerning the MASH technique, contains two loops, the loop "subtractor 13.fwdarw.integrator 15.fwdarw.quantizer 17.fwdarw.one-sampling delay 18.fwdarw.subtractor 13", and the loop "subtractor 19.fwdarw.integrator 16.fwdarw.quantizer 17'.fwdarw.one-sampling delay 18'.fwdarw.subtractor 19". Each loop contains only one integrator so that the respective phase loop will be maintained at 90.degree. and so that the circuit is absolutely stable.
When the circuit in FIG. 9 is expressed by the z-function, the following formulae (5) to (8) concerning the output signal Y1 of the first quantizer 17, output signal Y2 of the first quantizer 17', the subtraction results P and the one-sampling delay 18 are obtained respectively. EQU Y.sub.1 =X+(1-z.sup.-1)Q.sub.1 ( 5) EQU Y.sub.2 =P+(1-z.sup.-1)Q.sub.2 ( 6) EQU P=-Q.sub.1 ( 7) EQU Y=Y.sub.1 +(1-z.sup.-1)Y.sub.2 ( 8)
Then, the following formula (9) is obtained by solving the above formulae (5) to (8). ##EQU2##
Because formula (9) has the same configuration as formula (4), it is understood that the circuit shown in FIG. 9 has the second order noise shaping characteristics similar to that shown in FIG. 17.
However, when the above formulae are solved relating to the output signals M and N concerning the integrators 15 and 16 respectively, the following formulae (10) and (11) are obtained. EQU N=X-z.sup.-1 (1-z.sup.-1 Q (10) EQU M=X-z.sup.-1 Q-z.sup.-1 (1-z.sup.-1)Q (11)
The above formula (10) defines the output signal N of the integrator 15, and the other formula (11) defines the output signal M of the integrator 16. If the maximum absolute values of those signals do not exceed the dynamic ranges of integrators 15 and 16, stable noise shaping can be executed. However, if either value exceeds the corresponding dynamic range, the signal with the exceeded value is clipped at the maximum level or the minimum level of the respective integrators 15 and 16. If either signal is clipped, a drastic degradation of the S/N ratio will result accordingly. Because there is no correlative function existing between the input signal and quantize noise Q, the maximum absolute values of the output signal N of integrator 15 and that of output signal M of the integrator 16 are expressed by the following formulae (12) and (13) respectively, with the proviso "X&gt;&gt;(1-z.sup.-1)Q" in the low frequency region. ##EQU3##
According to the above formulae (12) and (13), it is clearly understood that the integrators 15 must have the X of the dynamic range and the integrator 16 must have the X + Q of the dynamic range in order to obtain the stable operation of the second-order .DELTA.-.SIGMA. noise shaping circuit. According to the noise shaping technique, even if the quantizer 17 has low resolution, a highly accurate signal can be obtained. Therefore, in most cases, the quantize noise Q will be enlarged so that the wide dynamic range is required for the second-stage integrator. Especially, when the noise shaping circuit is utilized with low-voltage type A-to-D converter, a serious problem may be caused. That is, the integrator mainly consists of an operational amplifier and a capacitor, and the dynamic range of the operational amplifier is comparatively small. Furthermore, the substantial dynamic range will be further decreased equal to the difference between the original dynamic range and the absolute value of the quantize noise Q . However the quantity of noise quantity respectively imparted to the transistors and power sources is constant whether or not the dynamic range is decreased. As a result, there would be yet another problem that the S/N ratio is degraded with the decrease in dynamic range of the input signal.
Meanwhile, in the case of the MASH technique, having a stable second order .DELTA.-.SIGMA. noise shaping circuit, the output signal N of the integrator 15 can be obtained in the following formula (14). EQU N=X-Q.sub.1 = X + Q.sub.1 (14)
Similarly, the output signal M of the integrator 16 can be obtained in the following formula (15). EQU M=-Q.sub.1 -Q.sub.2 - Q.sub.1 + Q.sub.2 (15)
According to the formulae (14) and (15), concerning the output signal N of the integrator 15 and the output signal M of the integrator 16, the maximum value of the output signal of the integrator 15 is N= X + Q.sub.1 . Consequently the dynamic range of X + Q.sub.1 is required for the integrator 15 and, simultaneously, the dynamic range of the input signal is decreased so that the S/N ratio is degraded.